An
overwhelming majority of logic designers use synchronous logic design
techniques to manage the complexity of their designs and rely on logic
simulation techniques for design verification. Yet, logic simulators do not
take advantage of the higher abstraction level provided by synchronous logic
design techniques to improve their performance. A general technique is
presented which takes advantage of the high degree of periodicity common in
synchronous logic designs. It is shown that a performance improvement of at
least 200% occurs when these techniques are applied within the COSMOS.
simulation system to simulate large digital systems.