Methods and apparatus for minimizing the impact of excessive instruction retrieval

A technique controls memory access requests. The technique involves acquiring a first series of requests including a prefetch request for performing a prefetch operation that prefetches a first set of instructions from a memory, and adding a first entry in a request queue in response to the prefetch request. The first entry identifies the prefetch operation. The technique further involves attempting to retrieve a second set of instructions from a cache to create a cache miss, and generating, in response to the cache miss, a second series of requests including a fetch request for performing a fetch operation that fetches the second set of instructions from the memory to satisfy the cache miss. The technique further involves acquiring the second series of requests that includes the fetch request, and adding a second entry in the request queue in response to the fetch request. The second entry identifies the fetch operation. The technique further involves invalidating the first entry in the request queue when the fetch request is acquired before the prefetch operation initiates, and maintaining the first entry in valid form in the request queue and performing the prefetch operation to completion when the fetch request is acquired after the prefetch operation initiates (Full Patent Here).