The paper describes the internal organization of the 21264, a 500 MHz, out of order, quad fetch, six way issue microprocessor. The aggressive cycle time of the 21264 in combination with many architectural innovations, such as out of order and speculative execution, enable this microprocessor to deliver an estimated 30 SpecInt95 and 50 SpecFp95 performance. In addition, the 21264 can sustain 5+ Gigabytes/sec of bandwidth to an L2 cache and 3+ Gigabytes/sec to memory for high performance on memory-intensive applications.